It is common in microprocessor-based electronic equipment to include two or more interconnected printed circuit boards, often including a main circuit board having a main controller or microprocessor (after termed the “motherboard” or “host”) and one or more connected daughtercards. In many electronic devices, some or all of the daughterboards may themselves be “intelligent, i.e., may have their own programmable controllers.
For example, embedded systems which run complex operating systems and applications on a host/motherboard system often depend on intelligent daughtercards (cards controlled by a microprocessor, ASIC, or FPGA) to provide the functionality of a network interface.
One important system requirement is a host/daughtercard interface to transfer data between the host memory and the memory on board the daughtercard. Additionally, the host must be able to manage the memory of the daughtercard and also initialize and reconfigure the daughtercard in response to end user changes to the system.
Often, daughtercards, such as network interface cards or line cards, must be backward compatible to the host system and must use a low-bandwidth legacy host/daughtercard interface, e.g., an 8-bit or 16-bit port, which is not suitable for enabling real-time, efficient, and fast operations. These low-bandwidth legacy parallel interfaces are primarily designed as a control/status interface.
In another scenario, a Direct Memory Access (DMA) controller is used to transfer data between memories resident on the host and daughtercards. While the use of a DMA controller appears to be efficient in terms of data movement, the use of an external controller adds to the cost of goods sold. Further, when designing daughtercards for an existing host system, it may not be possible to design a new, compatible DMA controller.
Accordingly, improved, backward compatible, cost effective techniques for interfacing resident memory on host and daughtercards are required in many technologies.